简介:
FEATURES
Support 1-port/2-port 6-bit/8-bit LVDS receiver that maximum clock rate up to 100 MHz.
Support 1-port 3-pair/6-pair 6-bit/8-bit mini-LVDS transmitter that maximum clock up to 340 MHz.
Support swap function for both LVDS input and miniLVDS output
Support HD (1366x768) and FHD (1920x1080)*1
Support built-in self test (BIST) pattern function
Support free-run mode (MUTE) function
Support spread spectrum clock generator (SSCG)
Support output data skew control function
Support dithering function
Support gamma correction function
Support DE mode only
Support POL 1-line dot, 2-line dot, 1+2-line dot , column inversion mode
Support control timing for GOA driving
Support fixed-gate-on control timing
Support programmable pixel arrangement for all panel structure
Support programmable control signals *2
Built-in low-voltage reset function
Supply voltage: 3.0 ~ 3.6V
Support external EEPROM ( 4k bytes ) with I2C interface.
64-pin TQFP 7x7 mm package (including pin 9x9 mm)